Chief Scientist for Computing, Physical & Computational Sciences Directorate, DOE-SC/ASCR Sector Lead, Pacific Northwest National Laboratory

“Co-design for Extreme Heterogeneity: Integrating Custom and COTS Hardware to Support Converged HPC Workloads”

Tuesday 14 February, 3.45pm – 4.25pm

Abstract

Future high-performance computing (HPC) challenges will be driven by the convergence of physical simulation, artificial intelligence & machine learning (AI/ML), and data science computing capabilities. While computational performance gains afforded by Moore’s Law have enabled large-scale HPC system design and deployment using commodity CPU and GPU processing components, new near and long-term technologies will be required to effectively support such converged workloads. These new technologies will integrate commodity computing components with custom domain-specific accelerators into ever-more heterogeneous architectures resulting in a diverse ecosystem of industry technology developers, university, and U.S. Government researchers. This overview describes efforts to construct an end-to-end co-design framework that lays a groundwork for such an ecosystem, including notable outcomes, remaining challenges, and future opportunities.

Bio

Jim is the Chief Scientist for Computing in the Physical and Computational Sciences Directorate (PCSD) at Pacific Northwest National Laboratory (PNNL), where he serves as the lab lead for the U.S. DOE, Office of Science (DOE/SC), Advanced Scientific Computing Research (ASCR) Program. PNNL’s ASCR portfolio includes over 20 R&D projects in applied mathematics, computer science, advanced architectures, 5G networking, and computational modeling and simulation. Jim’s computing leadership role also intersects with upstream technology challenges associated with microelectronics and semiconductors.

Shortly after joining PNNL, Jim helped organize the October 2018 DOE/SC workshop on Basic Research Needs for Microelectronics. The goal was to identify DOE’s Microelectronics R&D priorities for the next decade and beyond. This experience led to an invitation to serve on the executive committee for the Semiconductor Research Corporation (SRC) Decadal Plan. Several SRC workshops were held on topics that included, energy-efficient computing, networking and communications, analog electronics, memory and storage, and hardware support for cybersecurity and privacy. The outcomes of these workshops were documented in the SRC Decadal Plan report that describes the seismic shifts that will drive industry R&D challenges. Jim was recently appointed by the U.S. Commerce Secretary to serve on the DOC/NIST Industrial Advisory Committee to provide input on R&D gaps to address by the CHIPS and Science Act.

Slides